1. Field of the Invention
This invention relates to data processing systems. More particularly, this invention relates to data processing systems supporting multiple program instruction instruction sets.
2. Description of the Prior Art
It is known to provide data processing systems operable to process data under native control of program instructions of multiple instruction sets. An example of such systems are the microprocessor designs supporting the ARM and Thumb instruction sets produced by ARM Limited of Cambridge, England. These microprocessors are operable in an ARM state in which they execute 32-bit ARM instructions and in a Thumb state in which they execute 16-bit or 32-bit Thumb instructions. Whilst the instruction sets of the ARM and Thumb instructions are related, the instruction encodings used are different and typically separate instruction decoders are provided for each of the instruction sets.
Within highly pipelined implementations of such systems, the decoding of the instructions may take place at several different stages along the pipeline. For example, some decoding may take place early in the pipeline associated with branch prediction. In these circumstances, the need to track the current state of the processor in association with the instructions being passed along the pipeline, as well as to operate appropriately upon those instructions in the early pipeline stages, imposes a disadvantageous additional overhead.